About this opportunity
Advanced Technology Search lists this Senior Flip-Chip BGA Package Designer – SerDes & RF opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
A leading technology recruitment firm is seeking an experienced Package Design Engineer in Fort Collins, Colorado. This role involves designing complex flip-chip-BGA packages, particularly for ASICs in high-speed SerDes and RF communications. The ideal candidate has over 12 years of relevant experience and strong skills in Cadence tools, collaboration, and project management. This position offers a chance to innovate within a worldwide R&D team focused on developing cutting-edge technologies.
#J-18808-Ljbffr
Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.