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Prattwhitney

Senior FPGA Design Engineer

north tewksbury, MA

Check who can apply and the requirements below before continuing.

About this opportunity

Prattwhitney lists this Senior FPGA Design Engineer opportunity in north tewksbury, Massachusetts. Review the employer’s description below for duties, qualifications and application requirements.

Job description

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device families including Xilinx, Altera, and Microsemi. Designs are implemented using VHDL for gigabit serial interfaces, radio frequency (RF) and electro‑optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaboratively model algorithms, partition and perform code development, simulation, and place‑and‑route. Designs are verified against requirements using directed test and constrained random methodologies. Design support is expected from requirements definition through integration and test. Design documentation and configuration management are required.

Security clearance: The ability to obtain and maintain a U.S. government‑issued security clearance is required. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance. Security clearance type: Secret. Current security clearance status: Active and existing clearance required after day one.

What You Will Do

Design and deliver production‑quality FPGA releases from initial proof of concept up to production.

Architect FPGA‑based systems to determine parts, interfaces, and Concept of Operations (CONOPS).

Translate system‑level requirements into FPGA requirements.

Design and code in VHDL for reliability and maintainability.

Verify designs utilizing self‑checking techniques with directed and constrained random tests, tracking functional and code coverage.

Help drive projects and execute program schedules on time and budget.

Create complete documentation including requirements, verification plan, and user guides.

Lead small teams and mentor junior engineers.

Support internal and external technical reviews.

Qualifications

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of prior relevant experience.

Experience to include one of the following:

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding).

Xilinx or Microsemi devices and flow tools.

Delivering FPGA/ASIC solutions to system‑level applications.

Experience with integration and debug of FPGA/ASIC devices.

Preferred Qualifications

Radar processing techniques.

Image processing techniques for visual and infrared sensors.

Embedded systems design using ARM, Microblaze, or Nios processors.

Gigabit serial interfaces and multi‑gigabit transceivers (MGTs).

Constrained random verification in UVM using SystemVerilog.

Verification utilizing emulation platforms, such as Veloce.

Benefits and Compensation

Salary range: 86,800 USD – 165,200 USD.

Medical, dental, vision, life insurance, short‑term and long‑term disability.

401(k) match, flexible spending accounts.

Flexible work schedules, employee assistance program, annual incentive compensation programs.

Relocation assistance.

9/8 Schedule – every other Friday off!

Paid time off, holidays.

Equal Opportunity and EEO Statement

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, or veteran status. RTX provides affirmative action in employment for qualified individuals with a disability and protected veterans in compliance with Section503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act. This is a U.S.-based role; benefits and pay structure apply accordingly.

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