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Prattwhitney

Senior FPGA Design Engineer

tucson, AZ

Check who can apply and the requirements below before continuing.

About this opportunity

Prattwhitney lists this Senior FPGA Design Engineer opportunity in tucson, Arizona. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Location: US-AZ-TUCSON-M02 - 1151 E Hermans Rd - BLDG M02; Onsite position.

Security Clearance Requirements

Active and transferable U.S. government-issued security clearance is required prior to start date. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance.

What You Will Do

Design and deliver production-quality FPGA releases from initial proof of concept up to production.

Architect FPGA-based systems to determine parts, interfaces, and Concept of Operations (CONOPS).

Translate system-level requirements into FPGA requirements.

Design and code in VHDL for reliability and maintainability.

Verify designs using self-checking techniques with directed and constrained random tests, while tracking functional and code coverage.

Help drive projects and execute program schedules on time and budget.

Create complete documentation including requirements, verification plan, and user’s guides.

Lead small teams and mentor junior engineers.

Support internal and external technical reviews.

Qualifications You Must Have

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 5 years of prior relevant experience.

Experience with FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using SystemVerilog coding.

Experience working with Xilinx or Microsemi devices and associated flow tools.

Experience delivering FPGA/ASIC solutions for system-level applications.

Qualifications We Prefer

Hands-on experience with integration and debugging of FPGA/ASIC devices.

Radar processing techniques.

Image processing techniques for visual and infrared sensors.

Embedded systems design using ARM, Microblaze, or Nios processors.

Gigabit serial interfaces and multi-gigabit transceivers (MGTs).

Constrained random verification in UVM using SystemVerilog.

Verification utilizing emulation platforms, such as Veloce.

Benefits & Compensation

Salary range: 86,800 USD – 165,200 USD.

Benefits include medical, dental, vision, life insurance, short-term disability, long-term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, Employee Scholar Program, parental leave, paid time off, and holidays. Incentive compensation programs are provided at the level of the position and may include short-term and long-term annual incentive compensation.

Equal Opportunity Employer

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status, or any other applicable state or federal protected class.

RTX provides affirmative action in employment for qualified individuals with a disability and protected veterans in compliance with Section 503 of the Rehabilitation Act and the Vietnam Era Veterans’ Readjustment Assistance Act.

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Worksite address

tucson, AZ, 85718, US

Who can apply

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