Senior Hardware Design Engineer: RTL/ASIC & FPGA

Job description

Rambus is seeking a qualified candidate for a role in Hillsboro, Oregon, emphasizing strong expertise in System Verilog/Verilog RTL design. Responsibilities include RTL coding, integration, and customer support. The ideal candidate will have substantial experience in ASIC or FPGA design, strong communication skills, and a Bachelor's in Electrical Engineering (BSEE). Expertise in simulation tools and ability to work independently are preferred. Join our innovative team to contribute to cutting-edge memory solutions.

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Who can apply

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