About this opportunity
MediaTek lists this Senior Memory Architect for HPC ASICs & Edge AI opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
MediaTek Research Lab Inc. in San Jose, CA is seeking a Principal Memory Design Engineer/Senior Technical Manager with 10+ years in embedded memories to architect high‑performance memory circuits for HPC ASICs and Data Center AI workloads.
You will lead DTCO initiatives, collaborate with Data Center customers and cross‑functional teams to deliver SRAM, TCAM, CIM and related memories, and mentor designers while staying hands‑on.
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.