About this opportunity
Roguebeam lists this Senior Physical Design Engineer: End-to-End ASIC/FPGA opportunity in seattle, Washington. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Roguebeam is seeking a Senior Physical Design Engineer to own block- and chip-level implementation from netlist to GDS, with FPGA P&R support, for phased-array solutions. You will floorplan, place, clock, route, and sign off silicon that carries digital beamforming and adaptive processing.
You will collaborate end-to-end on timing, CTS, and verification, integrating memories, high-speed interfaces, and DFT structures.
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Worksite address
seattle, WA, 98127, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.