About this opportunity
191 Altera Corporation lists this Senior Physical Design Engineer – FPGA SoC Innovator opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Altera in San Jose, CA seeks a Senior Physical Design Engineer to drive implementation of IP and SoC designs from RTL to GDSII, optimizing PPA and delivering signoff for next-generation FPGA products. You will work with RTL, CAD, DFT, timing, and verification teams to execute synthesis, floorplanning, CTS, STA, and a full physical design flow, aiming for robust power, performance, and area characteristics.
The role requires substantial hands-on experience with advanced EDA tools and a track
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.