Senior Physical Design Engineer – High-Performance PHY/SOC

Job description

Apple Inc. in Beaverton, Oregon is seeking a seasoned Physical Design Engineer to drive high-performance PHY designs from RTL to GDSII.

You will collaborate across architecture, CAD, timing and logic teams to deliver competitive silicon. Responsibilities include building block and full-chip floorplans, placing and routing to meet timing and power goals, generating timing constraints, and debugging LVS/DRC issues while contributing to CAD methodologies.

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Worksite address

beaverton, OR, 97078, US

Who can apply

Review the original listing for work authorization, qualifications and employer requirements.