About this opportunity
TSMC - Taiwan Semiconductor Manufacturing Company Limited lists this Senior Physical Design & Verification Engineer opportunity in california, Missouri. Review the employer’s description below for duties, qualifications and application requirements.
Job description
TSMC - Taiwan Semiconductor Manufacturing Company Limited in San Jose, California, is seeking an Advanced Physical Design and Verification Engineer to lead DRC/LVS/antenna checks and fix PDV/EMIR/Noise/SigEM issues. The role includes timing ECOs on high-performance blocks and customizing clocks within a hybrid work setup.
You will report to the Manager of the Advanced Chip Implementation team and join a team driving cutting-edge semiconductor technology.
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Worksite address
california, MO, 65018, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.