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Xscape Photonics Inc

Senior PIC Test Architect - Wafer & Die Level

santa clara, CA

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Job description

Xscape Photonics Inc. in Santa Clara, CA, seeks an experienced PIC Test Engineer to own wafer-level and die-level test strategy across the full product lifecycle from silicon bring-up to high-volume manufacturing.

You will lead test architecture, DFT collaboration, and scalable wafer probing solutions to drive robust, repeatable test content. The ideal candidate has 10+ years in PIC test engineering, proven ownership of test strategies, and a track record of scale-up across multiple nodes and

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Worksite address

santa clara, CA, 95053, US

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