About this opportunity
Lumilens lists this Senior/Principal Analog & Mixed Signal Design Engineers opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
About Lumilens
Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing—faster, cooler, and massively more efficient.
We’re a well-funded startup backed by Mayfield and led by veterans who’ve built and scaled some of the most transformative technologies in the industry. This isn’t incremental innovation's a ground-floor opportunity to rethink the optical layer from the silicon up. You’ll work alongside a team of world-class engineers solving some of the hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.
If you're looking for mission, momentum, and the chance to make an outsized impact—jump on the rocket ship. We’re just getting started.
Position Overview
We are seeking an experienced Analog / Mixed-Signal IC Design Engineer to design and deliver high-performance Driver and TIA circuits in BiCMOS and advanced semiconductor nodes. This role involves end-to-end ownership of analog building blocks, from architectural definition through silicon validation, in a fast-moving and technically rigorous environment. You will collaborate closely with digital, layout, and validation teams to deliver scalable, manufacturable analog IP.
Key Responsibilities
Architect and design high-speed analog and mixed-signal circuits, including:
Transmit drivers (linear and/or PAM-based)
Transimpedance amplifiers (TIAs) and receiver front-ends
Clocking and timing circuits (PLLs, DLLs, low-jitter references)
Biasing networks, bandgaps, and on-chip power regulation
Perform transistor-level design, simulation, and optimization across PVT corners.
Analyze and optimize bandwidth, noise, linearity, jitter, stability, and power.
Work closely with layout engineers on floorplanning, matching, isolation, and parasitic management.
Define and support silicon bring-up, characterization, and debug, including correlation to simulations.
Contribute to design methodology, IP reuse, and best practices across programs.
Required Qualifications
MS or PhD in Electrical Engineering or related field.
7+ years of hands-on analog or mixed-signal IC design experience.
Strong fundamentals in:
Feedback and stability analysis
Noise and jitter modeling
High-speed analog circuit design
Power integrity and substrate isolation
Experience taking Driver, TIA, or related analog blocks through tape-out and lab validation.
Proficiency with industry-standard analog design and simulation tools.
Preferred Qualifications
BiCMOS (SiGe) and/or advanced CMOS nodes.
High-speed data-path or I/O-adjacent analog circuits.
Experience with process scaling and technology trade-offs.
Exposure to silicon debug, failure analysis, and yield learning.
Why Join
Deep technical ownership with visible impact.
Opportunity to work in advanced semiconductor technologies.
Small, focused teams with high engineering standards.
Benefits
Competitive salary and significant equity compensation in a rapidly growing, well-funded startup.
Comprehensive health, dental, and vision insurance.
Flexible time off policy.
Direct impact on groundbreaking technology shaping the future of AI and data centers.
Opportunity to work with a highly experienced and collaborative team.
Dynamic and innovative work environment.
Opportunity for rapid career growth.
*All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.