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Job description
Micron Technology seeks a Senior/Principal Layout Engineer to drive pathfinding and architecture exploration for next-generation memory modules and form factors. You will lead layout-driven exploration, collaborate with SI/PI teams, and influence design decisions with layout insights.
Ideal candidates have 8+ years in high-speed PCB layout, deep DDR/LPDDR experience, and proficiency with Cadence Allegro/OrCAD; a BS in EE is required.
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Worksite address
california, MO, 65018, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.