About this opportunity
Micron Technology lists this Senior/Principal Layout Engineer: High-Speed PCB Architect opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Micron Technology is seeking a Senior / Principal Layout Engineer to drive pathfinding and architecture exploration for next-generation memory modules and form factors. The role requires deep expertise in high-speed layout, SI/PI co-design, and advanced PCB technologies, with the ability to influence architecture through layout-driven modeling.
US base salary range is $202,000.00 - $344,000.00 a year. Ideal candidates will mentor junior engineers and collaborate with cross-functional teams to
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.