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Rambus.com

Senior Principal Memory Controller RTL Lead (Hybrid)

hillsboro, OR

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Job description

Rambus seeks a Senior Logic Design Engineer to join the Memory Controller team in Hillsboro, OR. Lead RTL design, microarchitecture, and IP integration for high-performance memory controllers, collaborating across architecture, verification, and customer teams.

The role combines leadership with hands-on design, debugging, and delivery of production-quality silicon IP, with a hybrid work model enabling three onsite days per week and two remote days.

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Worksite address

hillsboro, OR, 97104, US

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Last received from source 2026-10-16View job