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Job description
Chelsea Search Group seeks a Senior/Principal Physical Design Engineer (remote) to drive ASIC physical implementation from RTL to GDSII, including floorplanning, placement, CTS, routing, and timing closure. You will work with RTL, verification, DFT, and analog teams to deliver high-performance silicon using Fusion Compiler and Calibre.
Ideal candidates have 10+ years in ASIC/SoC design, strong Verilog/SystemVerilog, and a proven record of first-pass success.
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Worksite address
portland, OR, 97204, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.