About this opportunity
Cadence Design Systems lists this Senior Principal Software Engineer - Physical Verification opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Cadence Design Systems seeks a Software Engineer for its Research & Development group, focusing on advanced software for physical verification at leading-edge semiconductor nodes. The role drives innovation in development and validation of software used to design and manufacture next-generation chips.
The position emphasizes designing robust software, validating and documenting solutions, and solving complex mathematical and geometric challenges within a geographically distributed team
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.