About this opportunity
IC Resources lists this Senior RTL Design Engineer — Memory Subsystems for AI opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
A leading semiconductor company is hiring a Senior RTL Design Engineer to develop memory subsystems in high-performance AI accelerators. The role requires expertise in SystemVerilog, HBM/LPDDR/DDR memory technologies, and timing closure. Ideal candidates will have 8+ years of experience and a BS/MS in Electrical or Computer Engineering. This full-time role offers a competitive salary ranging from $190,000 to $230,000 per year.
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.