About this opportunity
Mentium Technologies Inc. lists this Senior Soc Verification Engineer opportunity in santa barbara, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Mentium Technologies Inc. is seeking an experienced and highly motivated Digital Verification Engineer to join our ASIC/SoC design team. In this role, you will be responsible for developing and executing verification strategies to ensure functional correctness and robustness of complex digital and mixed-signal designs. You will work closely with RTL design, software and physical design teams to deliver high-quality silicon for advanced applications. This role offers an exciting opportunity to learn and work on cutting-edge vision AI accelerators, machine and deep learning algorithms, and make a meaningful impact on the development of a co-designed robust, client-facing hardware-software library.
While professional experience and qualifications are key for this role, make sure to check you have the preferable soft skills before applying if required.
Key Responsibilities
Design verification plans based on design assessment, specifications and discussions with design team
Build scalable UVM-based verification environments and reusable testbenches
Create and maintain directed and constrained-random test suites
Implement assertion-based verification (ABV) using SystemVerilog Assertions (SVA)
Drive functional coverage closure and regression analysis
Perform debug and root-cause analysis of simulation failures
Collaborate with design teams to resolve functional issues
Improve design quality using Lint and CDC/RDC checks and suggest RTL improvements
Create and maintain continuous integration and regression infrastructure
Perform formal verification and equivalence checking flows
Required Qualifications
Bachelor’s, Master’s, PhD’s degree in Electrical Engineering, Computer Engineering, or related field
3+ years (or higher for senior roles) of experience in digital verification for ASIC RTL designs
Strong experience with:
SystemVerilog
UVM methodology
Simulation and debug tools (e.G., VCS, Verdi)
Gate-level verification
Solid understanding of:
Digital design (RTL, FSMs, pipelines, clocking/reset)
Verification methodologies and testbench architecture
Experience with scripting (Python, tcl, shell) for automation
Preferred Qualifications
Experience with Synopsys Verification tools
Experience with formal verification
Knowledge of protocols/IP such as PCIe, AXI, SPI , RISC-V
Experience with git and CI automation
Experience in mixed-signal or SoC-level verification
Familiarity with EDA flows and regression infrastructure
Exposure to hardware/software co-verification
Familiarity with AI accelerators , ML Models and HW Implementations
Why Join Mentium?
At Mentium, you'll be at the forefront of vision AI technology, working alongside a talented team dedicated to innovation. We offer a collaborative environment where your contributions directly influence the development of cutting-edge solutions. xzgxqkn Join us to make a meaningful impact in the field of vision AI.
Benefits:
Competitive compensation packages
Opportunity to work on diverse, cutting-edge AI projects across a range of industries.
401(k)
Flexible PTO
Full PPO medical, dental, and vision insurance coverage
Worksite address
santa barbara, CA, 93190, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.