About this opportunity
Murata Manufacturing Co., Ltd. lists this Senior Staff Engineer, Foundry opportunity in san diego, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Select how often (in days) to receive an alert:
pSemi Corporation is a Murata company driving semiconductor integration. pSemi builds on Peregrine Semiconductor’s 30-year legacy of technology advancements and strong IP portfolio but with a new mission—to enhance Murata’s world-class capabilities with high-performance semiconductors. With a strong foundation in RF integration, pSemi’s product portfolio now spans power management, connected sensors, optical transceivers, antenna tuning and RF frontends. These intelligent and efficient semiconductors enable advanced modules for smartphones, base stations, personal computers, electric vehicles, data centers, IoT devices and healthcare. From headquarters in San Diego and offices around the world, pSemi’s team explores new ways to make electronics for the connected world smaller, thinner, faster and better.
Job Summary
This position is responsible for technical aspects of the foundry interface with external SOS, Off the Shelf, and SOI foundry partners. Senior Staff Foundry Engineer will drive and lead projects related sustaining fab process.
This position has responsibility for:
Maintain and sustain custom and off-the-shelf technologies for pSemi and muRata at our foundry partners. Serves as the technical owner for governance of DRC and manufacturability inquiries, issue triage, escalation, and closure across design, CAD, and manufacturing stakeholders.
Lead yield and quality excursions at the foundry (containment, root cause, corrective and preventive action), partnering with Product Engineering and Customer Quality; drive executive-ready technical narratives for customer-impacting events (including RMAs).
Establish KPIs and reviews for excursion response time, recurring defect prevention, and yield learning transfer across products and technologies.
Provide foundry and device-engineering technical leadership for technology development and sustaining, translating process and device learnings into design rules, signoff guidance, and reliability and yield guardbands.
Own the technical change-control workflow with foundry partners (process changes, PCNs, mask and reticle changes, and wafer-fab flows), including risk assessment, qualification strategy, and internal release recommendations.
Mentoring engineers to understand device physics and its’ relationship to product performance
Front line communication channel for customer and company communication for any processing, quality, reliability, tapeout, NPI, B2B data and DRC issues on custom wafer fab processes and off the shelf wafer fab processes
Customer engineering support as technical lead on wafer fab –related issues
Engage with CFTs to ensure manufacturing, DRC violations and assembly requirements are met
Interact with business units, supply chain, technology development teams, design, NPI and assembly experts to drive next generation products with appropriate reticle layout, tapeout requirements, cycle time, fab processing, capacity
Review tapeout floorplan, frame structures to ensure foundry-related test, assembly and customer requirements are met
Manage and drive major fundamental changes to frame and reticle tapeout structures and procedures to accommodate changing assembly and customer product performance needs
Lead end-to-end foundry transfer programs (qualification strategy, comparability plans, risk mitigation, and readiness reviews), ensuring continuity of yield, reliability, and cycle time for customer commitments.
Design and implement scalable foundry-engineering operating processes (intake, prioritization, documentation, and post-mortems) to improve cycle time, predictability, and cross-site execution.
Leverage past expertise with fab processes to ensure new designs and processes capture and utilize lessons learnt from past processing, tapeout, technical investigations and system issues
Travel up to 25% (Singapore and Japan)
Minimum Qualifications (Experience and Skills)
10+ Years of experience including semiconductor manufacturing, process development, or foundry technical interface
Experience working with deep sub-micron fab processes, wafer fab organizations based in Asia
Key experience interacting with product, technology, design, CAD, NPI, assembly,
Demonstrated leadership of cross-functional foundry programs with measurable outcomes (yield, excursion response, cycle time, reliability, or cost).
Experience driving foundry change control and PCNs and qualification decisions using structured risk and data analysis.
Strong external stakeholder management: leading technical escalations and negotiating technical tradeoffs with foundry counterparts.
Hands-on understanding of tapeout readiness: DRC and DFM methodology, mask and reticle considerations, and manufacturing constraints.
Education Requirements
BS & 10-12 years experience
MS & 7-10 years experience
Ph.D. & 5-7 years experience
This job operates in a professional office environment. This role routinely uses standard office equipment.
Physical Demands
The physical demands described here are representative of those that must be met by an employee to successfully perform the essential functions of this job. While performing the duties of this job, the employee is regularly required to talk or hear. The employee frequently is required to stand; walk; use hands to finger, handle or feel; and reach with hands and arms. Specific vision abilities required by this job include close vision, distance vision, color vision, peripheral vision, depth perception and ability to adjust focus. This position requires the ability to occasionally lift office products and supplies, up to 20 pounds.
USD 185,785.06 - 241,533.96
pSemi Corporation supports a diverse workforce and is committed to a policy of equal employment opportunity for applicants and employees. pSemi does not discriminate on the basis of age, race, color, religion (including religious dress and grooming practices), sex/gender (including pregnancy, childbirth, or related medical conditions or breastfeeding), gender identity, gender expression, genetic information, national origin (including language use restrictions and possession of a driver’s license issued under Vehicle Code section 12801.9), ancestry, physical or mental disability, legally-protected medical condition, military or veteran status (including “protected veterans” under applicable affirmative action laws), marital status, sexual orientation, or any other basis protected by local, state or federal laws applicable to the Company. pSemi also prohibits discrimination based on the perception that an employee or applicant has any of those characteristics, or is associated with a person who has or is perceived as having any of those characteristics.
Note: The Peregrine Semiconductor name, Peregrine Semiconductor logoand UltraCMOS are registered trademarks and the pSemi name, pSemi logo, HaRP andDuNE are trademarks of pSemi Corporation in the U.S. and other countries. All other trademarks are the property of their respective companies. pSemi products are protected under one or more of the following U.S. Patents:
#J-18808-Ljbffr
Worksite address
san diego, CA, 92189, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.