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Celestial AI

Senior Staff, SI/PI Engineer

santa clara, CA

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About this opportunity

Celestial AI lists this Senior Staff, SI/PI Engineer opportunity in santa clara, California. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Celestial AI is seeking a Senior SI/PI Engineer to help develop and validate Celestial’s world-class energy efficient AI compute and photonic data transmission solutions. Self-starter who is passionate about innovation and comfortable working on the cutting edge of VLSI / RF / Optical Networking technology. The ideal candidate will be comfortable solving the technical challenges of 2.5d die / package / PCB performance optimization and develop a design -> simulate -> correlate development process for package and PCB level interconnect and power delivery. Has a strong sense of ownership, loves turning ambiguity into real outcomes and working across all engineering and product functions to deliver required solutions in a timely manner.

In this role, you will work closely with engineers responsible for analog I/O design, die physical design, photonics, packaging, PCB, and validation. You will be responsible for performing simulations and design studies and reviewing PCB, Package, and silicon layouts to ensure Celestial AI test articles and end products meet appropriate SI/PI targets while taking into account cost-effectiveness, time to market, supply chain risk, and performance tradeoffs. Additional responsibilities include resolving SI/PI issues encountered on the path to high volume manufacturing during the NPI phase and developing technology roadmaps to support the overall company product roadmap. This job will require you to have strong project management, written and verbal communication skills as well as a can-do attitude to prioritize and address issues with a very high sense of urgency.

ESSENTIAL DUTIES AND RESPONSIBILITIES:

Use electromagnetic simulation software such as Ansys HFSS / SiWave or Cadence Sigrity Suite to perform pre and post layout simulations

Use layout software such as Cadence Allegro/APD viewers, Virtuoso, Klayout, etc. to review designs and modify designs for simulation

Use Real Time Oscilloscopes, Sampling Oscilloscopes, TDR, and VNA to verify performance, correlate models to simulation, and debug issues

Develop strong technical relationships within the company and externally with customers and vendors as a single point of contact for SI/PI design and manufacturing problems

Collaborate with industry peers and suppliers to stay abreast of industry advances and future roadmaps

Resolve daily technical issues with cross-functional engineering teams in a timely manner and drive for Celestial AI’s success

Actively manage SI/PI qualification of test articles and products, while operating within established cost and time constraints

QUALIFICATIONS:

Master’s degree or higher in Electrical Engineering or RF is preferred but not required

5+ years of experience in signal/power integrity

Expertise with time and frequency domain simulation and measurement

Prior experience with high speed serdes and power delivery modelling/optimization

Experience with Photonics is a plus

Ability to deliver effective results in collaborative cross-functional teams in a fast paced startup environment

Location: Bay area location is required.

For California location:

As an early startup experiencing explosive growth, we offer an extremely attractive total compensation package, inclusive of competitive base salary and a generous grant of our valuable early-stage equity. The target base salary for this role is approximately $160,000.00 - $185,000.00. The base salary offered may be slightly higher or lower than the target base salary, based on the final scope as determined by the depth of the experience and skills demonstrated by candidate in the interviews.

We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing.

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Worksite address

santa clara, CA, 95053, US

Who can apply

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