About this opportunity
Google LLC lists this Senior Static Timing Engineer opportunity in sunnyvale, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Google Sunnyvale, CA, USA
X In most instances, this position requires in-person interviews as part of the hiring process.
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with static timing analysis.
Experience in Primetime or Tempus Tcl scripting and static timing analysis debug.
Experience in full chip timing sign-off checklist criteria and overseeing final timing sign-off for ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience writing, reviewing and verifying complex Tcl constraints for static timing analysis.
Experience in extraction of design parameters, QoR metrics, and analyzing data trends.
Experience working with multiple foundries.
Knowledge of semiconductor device physics and transistor characteristics.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Static Timing Engineer on the chip implementation team, you will work on the physical implementation of ASICs using advanced technology nodes. You will work on constraint development and validation, and timing closure of large, complex high performance compute ASICs. You will develop static timing methodologies, margins, automation scripts, and write documentation. You will perform technical evaluations of vendors, tools, methodologies, and will provide recommendations. Additionally, you will work with architecture, logic design, and DFT teams to understand and implement their requirements.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Static Timing Engineer on the chip implementation team, you will work on the physical implementation of ASICs using advanced technology nodes. You will work on constraint development and validation, and timing closure of large, complex high performance compute ASICs. You will develop static timing methodologies, margins, automation scripts, and write documentation. You will perform technical evaluations of vendors, tools, methodologies, and will provide recommendations. Additionally, you will work with architecture, logic design, and DFT teams to understand and implement their requirements.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $ - $ (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google .
Perform full chip static timing analysis, timing ECO creation for timing convergence, and final timing sign-off for ASIC tape outs.
Debug and resolve common STA or design rule issues like unconstrained endpoints, maximum transition, minimum period, or minimum pulse width violations.
Develop timing constraint and verify it for sign-off.
Utilize Perl, Python, Tcl, or Bash to create static timing flow automation scripts.
Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.
Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.
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Worksite address
sunnyvale, CA, 94087, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.