About this opportunity
MediaTek Research Lab Inc. lists this Senior Technical Manager - RTL Design Engineer opportunity in austin, Texas. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Senior Technical Manager - RTL Design Engineer
Category
Chip Design
Location
Austin, TX
Experience
More than 8 Years Work Expe.
Job Description
MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, and Wi‑Fi 8. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world, enabling devices from smartphones, smart homes, and AI PCs to high-performance computing, automotive, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity.
Register Transfer Language design;
Register Transfer Language integration of ARM-based CPU subsystems;
Register Transfer Language development of module IP;
Front-end checks including Synthesis, Formal Equivalence check, CDC, Lint, power optimizations, and Timing constraint checks;
Scripting skills using Perl; and
Design Verification (DV), Design for Testability (DFT), Static Timing Analysis (STA), and Low Power Checks#LI-DNI
Main Requirements and Qualifications
Education Requirements: Bachelor’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Computer Engineering, or related field
Experience Requirements: 10 years of experience as a Senior Technical Manager, Department Manager, Design Engineer, Engineer, or related occupation
Skills Requirements:
2. Register Transfer Language integration of ARM-based CPU subsystems;
3. Register Transfer Language development of module IP;
4. Front-end checks including Synthesis, Formal Equivalence check, CDC, Lint, power optimizations, and Timing constraint checks;
5. Scripting skills using Perl; and
6. Design Verification (DV), Design for Testability (DFT), Static Timing Analysis (STA), and Low Power Checks
Salary range: $175,000.00 to $229,000.00
Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.
MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.
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Worksite address
austin, TX, 78716, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.