Job description
At TechBiz Global, we are providing recruitment service to our TOP clients from our portfolio. We are currently seeking an Senior Verification Engineerspecialist to join one of our clients' teams that develops RISC-V CPU cores. If you're looking for an exciting opportunity to grow in a innovative environment, this could be the perfect fit for you.
As a Senior Verification Engineer, you will work within the Verification Team and play a crucial role in ensuring the correctness and functionality of complex digital designs at the Register Transfer Level according to the specification, using advanced verification methodologies and tools to validate the designs.
Requirements
Master or PhD
English C1
Industrial experience +8 years
Proficiency in SystemVerilog and UVM
Knowledge of scripting languages (Python, Perl, Bash, TCL) and regression tools
Experience with simulation and simulation tools
Knowledge of revision control methodology and tools (git, svn)
Experience in block level and sub-system or top level verification
Experience with formal and dynamic verification
Strong problem-solving skills and attention to detail
Excellent communication and teamwork abilities
Highlights
-fluent English is required
Originally posted on Himalayas
Who can apply
The source lists worldwide eligibility. Accepted UTC offsets: UTC-11, UTC-10, UTC-9.5, UTC-9, UTC-8, UTC-7, UTC-6, UTC-5, UTC-4, UTC-3.5, UTC-3, UTC-2, UTC-1, UTC+0, UTC+1, UTC+2, UTC+3, UTC+3.5, UTC+4, UTC+4.5, UTC+5, UTC+5.5, UTC+5.75, UTC+6, UTC+6.5, UTC+7, UTC+8, UTC+8.75, UTC+9, UTC+9.5, UTC+10, UTC+10.5, UTC+11, UTC+12, UTC+12.75, UTC+13, UTC+14. Review the full description for employer-specific work authorization, residency and schedule requirements.