Job description
About TylSemi, Inc.
The Opportunity
The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?
That's what we solve. TylSemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.
This isn't a nice-to-have. It's the critical path.
Why Now
The Market Window
The semiconductor industry is going through its biggest architectural shift in 40 years:
• Moore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.
• Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.
• IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.
Translation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.
Culture & Team: How We Work
No Politics, No Bureaucracy
There are no layers, no approval chains, no corporate theater.
• If you have an idea, we test it. If it works, we ship it.
• No endless meetings, no PowerPoint presentations to convince middle management.
Remote-Friendly, Global Team
• US team: Bay Area preferred, but we hire the best people regardless of location
• India team: Building a world-class design center in Bangalore
Move Fast, Ship Real Products
We're not a research project. We have paying customers, committed capital, and aggressive timelines.
This is a company, not a lifestyle business. We're building to win.
What We Value
• Ownership mindset. You're not here to execute someone else's roadmap. You're here to define it.
• Bias for action. We move fast. Analysis paralysis doesn't fly here.
• Deep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.
• Low ego, high standards. We don't care about titles or politics. We care about results.
The Ask
If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.
We're asking you to walk away from that and bet on us.
Here's why you should:
• The market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.
• The team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.
• The traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.
• The work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.
This is the bet. Join us and build something that matters.
Or stay comfortable. No judgment.
But if you're the kind of person who wants to take the shot, we'd love to talk.
READY TO JOIN?
Role Overview
We are seeking aSoC Architectto define and drive the architecture of next-generation infrastructure. This role involves end-to-end ownership of system and SoC architecture, fromconcept to silicon, with a strong emphasis onscalability, performance, interconnects, and system-level optimization.
Key Responsibilities
Definesystem architecturefor complex SoCs, including IO, compute, interconnect and subsystems
Drive architecture forscalable and modular designs, including chiplet-based systems (UCIe)
Architect high-performance data movement across IO interfaces ( PCIe / UCIe / CXL / UALink / ESUN )
Collaborate with design and DV teams to ensurearchitectural feasibility and efficient implementation
Developperformance models and simulationstovalidatearchitecture choices
Drive trade-offs across: Performance, Power, Area and Cost
Work closely with customers and software teams to align architecture withreal-world workloads
Influence long-term roadmap and technology direction
Definesystem-level verification and validation strategies
Required Qualifications
Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Engineering, or related field
18+ years of experience inSoC or system architecture
Proventrack recordof architectingcomplex SoCs for AI, HPC, or Networking
Deep understanding of:
System-level design and trade-offs
High-speed IO protocols (UCIe, PCIe, Ethernet)
Data movement and interconnect design
Experience withperformance modeling and architectural simulation
Strong cross-functional collaboration skills
Preferred Qualifications
Knowledge ofcoherency protocols (CXL, CHI.)
Experience withpower/performance optimization at system level
Exposure tosoftware-hardware co-design
Experience withmemory architectures(DDR, HBM, cache hierarchies)
Familiarity withchiplet architectures and advanced packaging (2.5D/3D)
Key Attributes
Strong system-level thinking and architectural vision
Ability to balanceinnovation with practical execution
High ownership and accountability
Strong communicationand leadership skills
Success Metrics
Scalable and efficient SoC architectures across multiple generations
Achievement of performance, power, and cost targets
Strong alignment between architecture and silicon outcomes
Reduced architectural rework through early validation
Originally posted on Himalayas
Who can apply
Eligible countries: United States. Accepted UTC offsets: UTC-10, UTC-9, UTC-8, UTC-7, UTC-6, UTC-5, UTC+14. Review the full description for employer-specific work authorization, residency and schedule requirements.