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Sr. Firmware Engineer, Annapurna Labs, Machine Learning Acceleration - Power and Performance (AWS)

austin, TX

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About this opportunity

Amazon lists this Sr. Firmware Engineer, Annapurna Labs, Machine Learning Acceleration - Power and Performance (AWS) opportunity in austin, Texas. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Sr. Firmware Engineer, Annapurna Labs, Machine Learning Acceleration - Power and Performance

AWS Utility Computing (UC) provides product Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

We are seeking a Senior Firmware Engineer to join our Power Architecture team, developing firmware algorithms for power and performance management on ML Acceleration Chips. In this role, you will design and implement intelligent control algorithms, optimization strategies, and real-time decision‑making systems that maximize performance while managing power and thermal constraints.

You will develop sophisticated firmware that monitors system state, makes dynamic trade‑offs between power and performance, and implements adaptive control policies. To enable this work, you will also build instrumentation and tracing capabilities that provide the telemetry needed to develop, tune, and validate your algorithms, with collected data optionally post‑processed using cloud‑based analytics.

Key Responsibilities

Design and implement firmware algorithms for power management, thermal control, and performance optimization on ML acceleration hardware.

Develop real‑time control policies and state machines that dynamically balance power, thermal, and performance constraints.

Create optimization algorithms for resource allocation, frequency/voltage scaling, and workload scheduling.

Implement efficient data structures and algorithms suitable for embedded, resource‑constrained environments.

Design and implement on‑device tracing and telemetry collection systems to support algorithm development and validation.

Build developer tools and data pipelines for metric collection, analysis, and visualization of algorithm behavior.

Implement low‑overhead instrumentation that minimizes impact on workload performance.

Collaborate with hardware architects to understand hardware capabilities and identify optimal instrumentation points.

Develop automated testing and validation workflows; integrate with optional cloud‑based analytics pipelines.

Own firmware code quality through rigorous testing, debugging, and validation on hardware.

A Day in the Life

You will work closely with power architects and hardware teams to understand silicon capabilities, implement low‑level control mechanisms, and create the algorithms and tooling that deliver optimal system behavior.

Basic Qualifications

5+ years of non‑internship professional software development experience.

Experience as a mentor, tech lead, or leading an engineering team.

Bachelor’s degree in computer science, electrical engineering, or related field.

Strong firmware or embedded systems development experience.

Proficiency in C/C++ for systems programming with strong foundation in algorithms and data structures.

Experience implementing efficient algorithms in resource‑constrained, real‑time environments.

Experience with hardware interfaces, instrumentation, or performance monitoring.

Strong debugging skills with hardware‑software systems.

Experience building developer tools or instrumentation frameworks.

Preferred Qualifications

Experience developing control algorithms, optimization algorithms, or state machines in firmware.

Experience with power management algorithms, thermal control policies, or dynamic performance optimization.

Background in tracing frameworks, telemetry systems, or performance analysis.

Understanding of algorithmic complexity and optimization techniques for embedded systems.

Familiarity with hardware performance counters, on‑chip monitoring, or hardware debug interfaces.

Experience with data collection pipelines and scripting (Python, shell) for algorithm validation.

Understanding of ML training/inference workloads and their performance characteristics.

Strong ownership, works effectively in ambiguous situations, demonstrates a bias for action while consistently delivering impactful results.

Compensation

Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $151,300/year in our lowest geographic market up to $261,500/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job‑related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign‑on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits.

Amazon is an equal‑opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

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Worksite address

austin, TX, 78716, US

Who can apply

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