About this opportunity
Redolent, Inc lists this Sr. SoC Design Integration Engineer opportunity in redmond, Washington. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Job TitleKey Requirements:Experience: Minimum 12+ years of total experience required.At least 10 years of hands-on experience in SoC Design and SoC Integration.Minimum 5+ years of experience in verifying GPU/CPU designs.Verification Expertise: Proven experience in developing UVM-based verification environments from scratch.Experience in SoC-level verification is a must.Programming Skills: Strong command over Python (must be the primary programming language used).Candidate Quality: No junior profiles should be submitted.Candidates must meet or exceed experience requirements.Minimum Qualifications •Track record of 'first-pass success' in ASIC development cycles. •Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. •8 to 10 years of hands-on experience in SystemVerilog/UVM methodology •Experience in one or more of the following areas along with functional verification-SV Assertions, Formal, Emulation. •Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.Preferred Qualifications •Experience verifying GPU/CPU designs. •Experience in development of UVM based verification environments from scratch. •Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs. •Experience with revision control systems like Mercurial(Hg), Git or SVN. •Experience with IP or integration verification of high-speed interfaces like PCIe, DDR, Ethernet. •Experience working across and building relationships with cross-functional design, model and emulation teams. •Define and implement SoC verification plans, build verification test benches to enable sub-system/SoC level verification. •Develop functional tests based on verification test plan. •Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. •Debug, root-cause and resolve functional failures in the design, partnering with the Design team. •Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality. •Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry.
Worksite address
redmond, WA, 98052, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.