About this opportunity
Micron lists this Staff DRAM Design Engineer - Architect & Validate Memory opportunity in boise, Idaho. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Micron Technology is seeking a Staff DRAM Design Engineer to shape memory architectures and drive circuit innovations from concept to silicon validation. You will lead DRAM circuit design, optimize performance, power, and die size while collaborating with cross-functional teams to deliver impactful results.
The role requires hands-on circuit design, SPICE/Verilog analysis, and experience with memory architectures.
#J-18808-Ljbffr
Worksite address
boise, ID, 83708, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.