About this opportunity
Teradyne lists this Staff FPGA Engineer - High-Performance SoC Test opportunity in reading, Massachusetts. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Teradyne's Compute Test Division seeks a Staff FPGA Engineer to design and deliver high-performance FPGA-based solutions at the heart of our test platforms in North Reading, MA. You will lead FPGA developments across interfaces, timing, and system constraints.
You will collaborate with hardware, software, and design verification teams, mentor junior engineers, and drive robust, scalable solutions that improve semiconductor device quality and performance.
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Worksite address
reading, MA, 01814, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.