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Belcan

System-on-Chip Design Engineer

bellevue, WA

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About this opportunity

Belcan lists this System-on-Chip Design Engineer opportunity in bellevue, Washington. Review the employer’s description below for duties, qualifications and application requirements.

Job description

Chip Design Engineer

Are you passionate about digital silicon design and verification? We're looking for an experienced Chip Design Engineer to help shape and validate realistic semiconductor design training environments while working across the full chip design lifecycle.

Location: Remote / Hybrid (as applicable)

Experience: 10+ Years

Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent

Key Responsibilities

✅ Review and validate RTL design, verification, and physical implementation tasks for technical accuracy and realism.

✅ Support development of chip design training environments across design, verification, and physical implementation domains.

✅ Assess solutions and define technical skill benchmarks for engineering tasks.

✅ Collaborate closely with building teams, model training teams, and domain experts.

✅ Drive continuous improvement of task quality, realism, and engineering standards.

✅ Explain design decisions, methodologies, and tradeoffs involving power, performance, area, and verification.

Required Qualifications

✔ 10+ years of Digital ASIC or SoC design experience.

✔ Strong expertise in:

RTL Design

SystemVerilog Design & Verification

SystemVerilog Assertions (SVA)

✔ Hands-on experience with Synopsys EDA tools:

VCS

Design Compiler

IC Compiler II / Fusion Compiler

PrimeTime

✔ Deep understanding of front-end design, verification, and physical design flows.

✔ Ability to communicate complex technical concepts and engineering tradeoffs effectively.

✔ Strong project management, stakeholder engagement, and collaboration skills.

Preferred Qualifications

⭐ Full RTL-to-GDSII flow experience.

⭐ UVM-based verification environment development.

⭐ Static Timing Analysis (STA).

⭐ Low-Power Design (UPF).

⭐ Design for Testability (DFT).

⭐ Experience with industry-standard EDA tool suites.

What We're Looking For

We're seeking a detail-oriented engineer who can combine strong technical expertise with excellent communication and collaboration skills. The ideal candidate will be comfortable working independently, partnering with cross-functional teams, and driving excellence in chip design training and evaluation programs.

Interested candidates can apply directly or reach out via DM.

#Hiring #ChipDesign #ASIC #SoC #RTLDesign #SystemVerilog #Verification #SVA #UVM #PhysicalDesign #VLSI #SemiconductorJobs #PrimeTime #DesignCompiler #VCS #ICCompilerII #FusionCompiler #STA #DFT #EngineeringJobs

Worksite address

bellevue, WA, 98009, US

Who can apply

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