About this opportunity
TekWissen ® lists this Validation Engineer - Senior opportunity in san jose, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
This range is provided by TekWissen ®. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range
$50.00/hr - $50.00/hr
Job Title: Validation Engineer - Senior
Work Location: San Jose, CA
Duration: 6 Months
Work Type: Temporary Assignment
Job Type: Onsite
Pay Rate: $50.00-$50.00/hr
Overview:
TekWissen is a global workforce management provider headquartered in Ann Arbor, Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories, graphics processors, motherboard chip sets, and a variety of components used in consumer electronics goods.
Job Description:
In this role, this engineer will be part of a highly technical team that develops test plans, completes functional & electrical validation, & debugs issues for memory controller/PHY, NOC & other high speed silicon interfaces such as DDR5/LPDDR5.
The Engineer will create electrical & functional test plans for client processors using hardware & software validation tools & debug electrical & functional issues.
The Engineer will also provide detailed input into the platform definition & review of platform designs used in the silicon validation of new processors.
EXPERIENCE AND REQUIREMENTS:
Bachelors in Electrical Engineering or Computer Engineering with 8-9 years of related experience; or Masters plus at least 5 years directly related experience (an advanced degree will be considered a plus)
Has demonstrated technical expertise in the development & execution of platform level functional test plans
Experience in Platform level electrical characterization with DDR Memory Interfaces (LPDDR5, DDR5, etc) and I/O standards is a must
3-4 Years of direct FPGA bringup or validation experience is a must.
Demonstrated experience with or knowledge using oscilloscopes, good scripting skills using Tcl or Python, and MS Windows and Office applications
Requires good written and oral communication skills
Demonstrate the ability to communicate with a variety of engineering disciplines and management.
TOP MUST HAVE SKILLS:
Have experience bringing up or validating Memory interfaces (DDR4/DDR5, LPDDR4/5)
Have experience working in a lab environment using lab tools such as Oscilloscopes, etc
Working knowledge of scripting languages such as Python, tcl etc and knowledge of FPGA's (Client or Altera)
Working knowledge of Client Vivado and Vitis tools and experience working with embedded processors.
TekWissen® Group is an equal opportunity employer supporting workforce diversity.
Seniority level
Mid-Senior level
Employment type
Contract
Job function
Manufacturing and Engineering
Industries
Semiconductor Manufacturing
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Worksite address
san jose, CA, 95199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.