About this opportunity
Omnicom Production lists this Verification Engineer: SV/UVM for SoC/AI Projects opportunity in toponas, Colorado. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Omnicom Production is seeking a Design Verification Engineer with SystemVerilog and UVM experience to support verification of advanced CPU/GPU based SoCs for major clients worldwide.
The role involves building SV/UVM environments, developing pre-silicon test plans, and crafting directed and random tests to verify IP functionality, with opportunities across AI, aerospace, medical electronics, and vision processing domains, plus collaboration across geographically distributed teams to ensure
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Who can apply
Review the original listing for work authorization, qualifications and employer requirements.