About this opportunity
Apple Inc. lists this Wireless PHY Verification Engineer – RTL/UVM Specialist opportunity in cupertino, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Apple seeks a PHY Design Verification Engineer in the San Francisco Bay Area to contribute to wireless silicon development and DV methodology. You will build and run constrained-random tests, develop test benches, and verify pre-silicon RTL for wireless PHY interfaces, collaborating with RF/Analog, Systems, and FW teams.
Preferred skills include Verilog/SystemVerilog/UVM, Matlab, and FPGA validation, with a background in ASIC verification flows and test coverage.
#J-18808-Ljbffr
Worksite address
cupertino, CA, 95014, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.