About this opportunity
Apple Inc. lists this Wireless SoC DV Engineer RTL/UVM & AI-Driven Testing opportunity in san francisco, California. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Apple Inc. in the San Francisco Bay Area is seeking a Wireless Design Verification Engineer to drive pre-silicon RTL verification of wireless MAC interfaces within a world-class SoC team.
You will develop reusable testbenches, execute directed and constrained random tests, debug issues, and collaborate across DV teams to elevate verification quality. Familiarity with Verilog/SystemVerilog, UVM, and AI-assisted DV is valued.
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Worksite address
san francisco, CA, 94199, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.