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Job description
MaxLinear, Inc. is seeking a Senior Principal Digital Design Engineer in California to lead digital design of advanced SoCs. You will define microarchitectures, translate PCIe/Ethernet standards into RTL, and collaborate across DV, PD, and firmware teams for architecture, PPA, and execution plans.
The role requires deep experience with SystemVerilog, UVM-based verification, and end-to-end ASIC front-end flow, including power and timing closure. Strong leadership and communication are essential.
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Worksite address
irvine, CA, 92713, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.