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Job description
IntelliPro is seeking a Principle Digital IC Design Engineer in Santa Clara, CA or Raleigh, NC to own and optimize the digital RTL-to-GDSII flow for mixed-signal PMICs and high-speed data paths.
You will drive backend synthesis, DFT/MBIST insertion, clock tree design, and timing closure, collaborating with System Architects and layout teams to achieve high-frequency performance and low area/power.
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Worksite address
santa clara, CA, 95053, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.