About this opportunity
Micron Technology, Inc lists this Senior DRAM Design Engineer — Memory & IC Layout Lead opportunity in boise, Idaho. Review the employer’s description below for duties, qualifications and application requirements.
Job description
Micron Technology, Inc is seeking a Senior DRAM Design Engineer in Boise, Idaho. The role involves contributing to circuit design, layout, and verification while collaborating with various engineering groups to ensure product manufacturability.
Qualified candidates should have a BSEE or MSEE with at least four years of experience in Semiconductor Design. Expertise in modeling and simulation tools such as SPICE and Verilog is also essential.
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Worksite address
boise, ID, 83708, US
Who can apply
Review the original listing for work authorization, qualifications and employer requirements.